Multi-level break/continue with a loop label is part of Ada, VHDL, and Perl; all three spell 'continue' as 'next'; Ada and VHDL say 'exit' instead of 'break' and Perl says 'last'. Verilog has 'disable ...

Hypothetically, if __enter__ could be a generator, with the with body running for each yielded value, that would give us the power to implement class Loop: def __enter__(self): self._do_continue = ...